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  We provide projects on wireless communication, WEKA, SentiWordNet, SDN, QUALlNet, OPNET, OpenCV, MiniNet, PEERSIM and so on

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  We do research on Wordnet, Grid Computing, Cloud Computing, Computer Networking, etc

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  We provide electrical projects based on power electronics, MATLAB Simulink and SIM Power

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  For Electronics Engineering Students we support technologies like ARM, GSM, GPS, RFID, Robotics, VLSI, NSL, NS3, OMNet++, OPNet, QUALNET, PeerSim

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  For Computer Science Students we support NS2, NS3, MATLAB, Java, OMNeT++, OPNet, CloudSim, Qualnet, Weka, Wordnet, Dot Net, Hadoop,….

VLSI Projects for M Tech Students

VLSI PROJECTS FOR M. TECH STUDENTS:

• Design and VLSI implementation of novel pre-screening and simplified sorting based K-best detection for MIMO systems
• A VLSI Circuit Emulation of Chemical Synaptic Transmission Dynamics and Postsynaptic DNA Transcription
• A VLSI architecture for watermarking of grayscale images using weighted median prediction
• DEJA VU: An Entropy Reduced Hash Function for VLSI Layout Databases
• A survey on VLSI Floorplanning: Its representation and modern approaches of optimization
• A high-throughput HEVC deblocking filter VLSI architecture for 8k×4k application
• Energy Optimized Subthreshold VLSI Logic Family With Unbalanced Pull-Up/Down Network and Inverse Narrow-Width Techniques
• A review report on low power VLSI systems analysis and modeling techniques
• Power- and thermal-aware testing of VLSI circuits and systems
• A unified VLSI architecture for addition and multiplication in GF(2m)
• VLSI Architecture Design of FM0/Manchester Codec with 100% Hardware Utilization Rate for DSRC-Based Sensor Nodes in ITS Applications
• A parallel VLSI architecture of contactless HCI system
• Parallel two step random walk algorithm to analyze VLSI power grid networks
• An efficient interpolation filter VLSI architecture for HEVC
• An algorithm for Via minimization in two layer channel routing of VLSI design
• VLSI implementation of fractional motion estimation interpolation for high efficiency video coding
• A Hamming code based technique to resolve the bit flip impact on compressed VLSI test data in IP core based SoC
• PSO: An approach to multiobjective VLSI partitioning
• VLSI architecture for an area efficient Elliptic Curve Cryptographic processor for embedded systems
• Depth-Reliability-Based Stereo-Matching Algorithm and Its VLSI Architecture Design
• A 6.42 mW low-power feed-forward FxLMS ANC VLSI design for in-ear headphones
• Cloud Computing For VLSI Floorplanning Considering Peak Temperature Reduction
• Crossing register transfer level for VLSI circuits
• A novel VLSI design of DCTQ processor for FPGA implementation
• Rectilinear Steiner Clock Tree Routing Technique with Buffer Insertion in Presence of Obstacles