Comparative analysis of different optimization technique for Sobel edge detection on FPGA

Comparative analysis of different optimization technique for Sobel edge detection on FPGA In this paper we preset implementation of an optimized Sobel edge detection algorithm on FPGA. The optimized gradient based edge detection method reduces the area up to 48.76% compared to existing gradient calculation unit, and also reduces propagation delay up to 51% compared to the area optimized architecture. The entire project is implemented on Spatran-3E FPGA board. VGA interface is used to display the edge detection image on the monitor.