Energy Aware Computation Driven Approximate DCT Architecture for Image Processing

Energy Aware Computation Driven Approximate DCT Architecture for Image Processing Energy crisis in multimedia devices causes poor image/video quality. These devices use compression standard having Discrete Cosine Transform (DCT) as core compute-intensive component. This paper presents novel approximation techniques that provide effective computation based on assumptions namely, transitive behavior of pixels, inter pixel approximation, and multiplicand value decision. We propose an energy aware computation driven approximate DCT architecture by exploiting these approximation techniques. The architecture emerges to have only 25 coefficients as an outcome which further incorporates interdependence among DCT alphabets. This inter-dependence results in squeezing of seven DCT alphabets into three. The efficacy of the proposed architecture is evaluated by different image quality assessment parameters. The architecture is mapped on Virtex – 6 FPGA to obtain top level analysis. A Semi Custom design is also realized using 45nm CMOS technology and simulated on HSIM. The simulation results show around 2.5× and 4.5× reduction in area (58%) and energy (72.6%), respectively, over existing design. This has been tested on Baseline JPEG standard for its effectiveness.