Standby leakage current estimation model for multi threshold CMOS inverter circuit in deep submicron technology

Standby leakage current estimation model for multi threshold CMOS inverter circuit in deep submicron technology Multi Threshold CMOS (MTCMOS) circuit can be used to overcome the trade-off between speed and standby leakage current inherent in single threshold CMOS circuit. The simplest form is the dual threshold CMOS (DTCMOS), in which two threshold voltages are used in the same logic circuit. As a result, the standby power can be greatly reduced by this approach which is a key factor for battery operated devices. This paper proposed a model for analytical calculation of standby leakage current for MTCMOS Inverter circuit in 90nm technology. We have used BSIM device model which is a widely used industrial model for standby leakage current modelling of MTCMOS Inverter circuit.